Designing for the Neural Processing Unit on AMD Ryzen AI with Open-Source Tools#
Abstract#
In this tutorial, we will describe the AMD Ryzen™ AI architecture platform, discuss the neural processing unit (NPU), and provide hands-on experience with the open-source software tools to implement designs. AMD Ryzen™ AI is the first in a new class of NPUs designed for x86 computers. Built on the AMD XDNA™ spatial dataflow computer architecture, the NPU consists of a tiled array of AI Engine processors, a set of VLIW vector processors with adaptable interconnect, designed to offer lower latency and better energy efficiency.
Participants will first gain insight into the system architecture of an x86 Ryzen AI processor and the AI Engine compute and data movement capabilities through the Riallto open-source exploration framework. Riallto lets users explore the NPU architecture and its programming tools running on Jupyter notebooks. This hands-on tutorial will guide attendees through a series of vision processing examples illustrating various NPU architectural features. You will also see how to program the NPU using Riallto. Then, the IRON AIE programming guide and examples introduce the participants to writing their own compute kernel and data movement. This Interface Representation for hands-ON (IRON) is an API for close-to-metal programming of the AIE-array. It is an open-access toolkit enabling performance engineers to build fast and efficient, often specialized designs through a Python API for MLIR-AIE, AMD MLIR dialect representing the AIE-array. Finally, we will briefly show how the AMD Ryzen™ AI Software allows users to seamlessly run AI inference on the AMD Ryzen™ AI based PC.
Agenda#
The times in this agenda are tentative.
Time |
Topic |
|---|---|
13:30 PM – 15:00 PM |
Tutorial Welcome and General Introductions |
15:00 PM – 15:30 PM |
Coffee Break |
15:30 PM – 17:00 PM |
Write your own compute kernel and connectivity |
Reference material can be found here: riallto.ai, IRON AIE programming guide and examples.
About Us#
Presenter: Dr. Mario Ruiz Mario is a member of technical staff in AMD University Program. As part of this role, he delivers training workshops for academics on the latest AMD tools and technologies. Mario completed his PhD in the Autonomous University of Madrid, which was focused on exploring High Level Synthesis tools in the context of networking. Mario is an active contributor to Riallto.
This tutorial is also organized by: Cathal McCabe
We are part of the Advanced and Research Development team at Advanced Micro Devices, Inc. (AMD)
Contact Us#
You can reach us at aup@amd.com.
Register#
2 September, 2024
13:30 PM - 17:00 PM
In Person: Check the FPL 2024 site for more information. http://asaclab.polito.it/fpl2024/